XC3142A-3PQ100C

Product Summary

The XC3142A-3PQ100C is an Field Programmable Gate Array. It provides a group of high-performance, high-density, digital integrated circuits. The regular, extendable, flexible, user-programmable array architecture of the XC3142A-3PQ100C is composed of a configuration program store plus three types of configurable elements: a perimeter of I/O Blocks (IOBs), a core array of Configurable Logic Bocks (CLBs) and resources for interconnection. The XC3142A-3PQ100C also provides a variety of logic capacities, package styles, temperature ranges and speed grades.

Parametrics

XC3142A-3PQ100C absolute maximum ratings: (1)Supply voltage relative to GND:–0.5V to +7.0V; (2)Input voltage with respect to GND:–0.5V to VCC +0.5V; (3)Voltage applied to 3-state output:–0.5V to VCC +0.5V; (4)Storage temperature (ambient):–65℃ to +150℃; (5)Maximum soldering temperature (10 s @ 1/16 in.):+260℃; (6)Junction temperature plastic:+125℃; (7)Junction temperature ceramic:+150℃.

Features

XC3142A-3PQ100C features: (1)Guaranteed toggle rates of 70 to 370 MHz, logic delays from 7 to 1.5 ns; (2)System clock speeds over 85 MHz ; (3)Low quiescent and active power consumption; (4)Compatible arrays ranging from 1,000 to 7,500 gate ; (5)complexity; (6)Extensive register, combinatorial, and I/O capabilities; (7)High fan-out signal distribution, low-skew clock nets; (8)Internal 3-state bus capabilities; (9)TTL or CMOS input thresholds; (10)On-chip crystal oscillator amplifier; (11)Over 20 different packages; (12)Plastic and ceramic surface-mount and pin-grid-array packages; (13)Thin and Very Thin Quad Flat Pack (TQFP and VQFP) options; (14)Standard, off-the-shelf product availability; (15)100% factory pre-tested devices; (16)Excellent reliability record; (17)High-end additional family member in the 22 X 22 CLB array-size XC3195A device; (18)8 mA output sink current and 8 mA source current; (19)Maximum power-down and quiescent current is 5 mA; (20)Additional interconnect resources for TBUFs and CE inputs; (21)Error checking of the configuration bitstream; (22)Soft startup holds all outputs slew-rate limited during initial power-up; (23)More advanced CMOS process.

Diagrams